Founding MTS — Chip Design & Verification
Own the chip design and verification intelligence that lets agents take a hardware block from intent all the way to verified, working design, owning design creation as much as verification. This role sits at the intersection of chip design and frontier AI, encoding how an experienced engineer reasons across the full design lifecycle into capabilities the agents can apply.
You'll build systems that let agents translate design intent and specifications into architecture and synthesizable RTL; assemble and integrate IP blocks and protocols into complete designs; and close the loop with simulation, lint/formal, assertions, coverage, and regression — all built on modern agentic AI infrastructure for reasoning, tool use, and evaluation.
You bring a BS/MS in CS, EECS, or related field; a strong background spanning RTL design and architecture, verification, ASIC flows, and SoC/IP integration; hands-on Verilog/SystemVerilog with simulation, assertion, and debug experience; and working Python plus a strong interest in applying agentic AI to hardware design.